Analog to digital converters (ADCS) are well known circuits that generate a digital codeword representing an analog signal. A variety of circuit schemes are known for ADCs including, for example, the successive approximation register ADC. Many analog to digital conversion processes involve multi-stage processes for example, to sample the analog signal, to sequentially test the analog voltage against various threshold voltages and to generate a digital codeword representing the value of the analog voltage. In a circuit with a single ADC, the circuit could not begin conversion of a new analog voltage while it is processing a current analog voltage. Thus, the processing time of an ADC can limit the rate at which a time varying analog signal can be sampled and converted to digital codewords.
A common technique to increase the rate of analog to digital conversion is to provide multiple ADCs in a circuit system and to employ them on a time-interleaved basis. During a time in which a first ADC is processing a first sample of an analog signal, other ADCs may take other samples of the analog signal and process them. The multi-ADC system, therefore, generates digital codewords at higher rates that a single ADC system. However, several error sources can arise from mismatch between the individual ADC's. Common error sources include offset, gain, linearity, and aperture delay. Various calibration techniques have been used to address offset, gain, and linearity errors, but aperture delay mismatch remains a difficult problem.
FIG. 1 illustrates a example of aperture delay mismatch that may occur in a multi-ADC system. Aperture delay mismatch can cause a delay in the times at which an ADC samples an input signal. In a multi-ADC system, aperture delay mismatch can cause one ADC circuit to sample an input signal at a time that is delayed from an ideal sample time by a certain offset time. The example of FIG. 1, illustrates an exemplary input signal IN which is to be sampled by four ADCs at regular intervals. An ADC2 may sample at a time that is offset from the idea by an aperture delay Δt. Thus, samples taken by ADC may include sampling errors that appear as systematic errors in the codewords output by the circuit system.
FIG. 2 illustrates simulation of an FFT taken of an input sine wave such as the IN signal of FIG. 1. Ideally, coding errors would be distributed randomly among all frequencies. Due to aperture delay mismatch among the ADCs, coding errors may be concentrated at certain frequency tones, which can create the systematic errors in the output signal.
No known circuit system adequately protects against aperture delay mismatch in a multi-ADC system. Prior attempts to solve systematic aperture delay artifacts have been attempted but they can be disadvantageous because they add other distortion to an output signal or they are prohibitively expensive by adding a large number of circuit components. Accordingly, there is a need in the art for a multi-ADC system with increased immunity to aperture delay mismatch.